In a blog for Arm, Matthew Griffin of the 311 Institute warns that cybersecurity is an increasingly pressing problem, with large criminal organizations raking in large sums of money and attacks able to impact a wide range of physical systems. Cadence's Paul McLellan checks out Google's video encoder chip and how it helps lower the CPU recycles required by the vast number of videos uploaded to YouTube every minute. Synopsys' Nikhil Amin and Harsha Vardhan explain the basics of UPF, its importance in the power landscape, how to expand low-power signoff with custom mechanisms, and how to approach things like hard RAM and hard macro where the connectivity of low-power control signals is unclear. In a blog for Siemens, EmLogic's Espen Tallaksen argues that many FPGAs and ASICs could be designed more efficiently and with fewer bug iterations at all levels if more attention is paid to creating a good design architecture from the outset. Coventor's Timothy Yang uses process modeling to identify an ALD thickness that minimizes the type of pattern offset and device non-uniformity that can be caused by self-aligned quadruple patterning.

Arm's Joshua Sowerby points to how to improve machine learning performance on mobile devices by using smart pruning to remove convolution filters from a network, reducing its size, complexity, and memory footprint. Mentor's Neil Johnson checks out how designers can write and verify RTL real-time using formal property checking in the style of test-driven development and why to give it a try. Cadence's Paul McLellan shares some highlights from the recent Linley Fall Processor Conference on the slowing of Moore's Law and key trends in AI acceleration in both the data center and at the edge. Synopsys' Arun Venkatachar looks at why IBM Research and Synopsys are collaborating to build AI-focused hardware and the progress that has already been made. Ansys' Rich Goldman and Peter Hallschmid consider the current state of photonics design with more sophisticated electronic-photonic flows and DFM capabilities, plus the major application areas seeing growing use of photonics.

Arm's Hongsup Shin explains a machine learning application that can determine which tests are most likely to find hardware bugs, improving efficiency and reducing the number of tests that need to be run. Synopsys' Pieter van der Wolf and Dmitry Zakharov take a look at the increasing need for low power processors optimized for machine learning tasks as IoT, smart home, and wearable devices proliferate. Mentor's Alex Belelovsky considers why manufacturers make tweaks to board designs, the risks involved, and the importance of transparency. Cadence's Paul McLellan listens in on what's new with Arm's latest projects and a discussion between the CEOs of Nvidia and Arm about the impending acquisition. Ansys' Ushemadzoro Chipengo digs into how simulation can improve the design, validation, and testing of automotive radar systems, especially for determining performance in rare or dangerous corner cases.

Cadence's Paul McLellan provides an overview of the new IEEE 1838 standard for manufacturing test of 3D stacked ICs and how it aims to enable testing of multi-die chiplet-based designs. In a video, Mentor's Colin Walls investigates the scope and lifetime of pointers in embedded applications. A Synopsys writer checks out the latest mobile memory standard, JESD209-5A, and the enhancements it contains to the existing LPDDR5 standard, including support for Partial Array Refresh Control, Refresh Management, Enhanced Write Clock Always On Mode, and Optimized Refresh. Rambus' Paul Karazuba takes a look at what makes machine learning models vulnerable to side-channel attacks and why differential power analysis detection and prevention techniques are needed for edge devices. In a blog for Arm, OctoML's Logan Weber and Andrew Reusch explain how optimizing and deploying machine learning workloads to bare-metal devices is becoming easier with Apache TVM and broad framework support, compiler middleware, and flexible autotuning and compilation capabilities.

Synopsys' Amit Paunikar and Shaily Khare take a look at new features in LPDDR5, from improved data bandwidth and Deep Sleep Mode to WCK clock. Cadence's Paul McLellan dives into forward error correction, a technique for automatically correcting errors in transmitted network data, with a look at why it's important and how it works. In his latest embedded software video, Mentor's Colin Walls explains inlining C/C functions, how it may benefit code execution, and what the downsides may be. Rambus' Aharon Etengoff checks out NIST's Draft Report on International IoT Cybersecurity Standardization about potential risks of unsecured consumer IoT components to the wider network, plus looks at the security-as-as-service model. Ansys' Mike Bak dives into structural analysis of PCBs and how to assess their ability to survive vibratory load environments from model creation through to evaluating component integrity based on the results of random vibration analysis.

Mentor's Matthew Balance examines the separation of concerns between test intent and test realization in the Portable Stimulus specification. Synopsys' Deepak Nagaria checks out the features that makes LPDDR4 efficient in terms of power consumption, bandwidth utilization, data integrity and performance. Cadence's Meera Collier listens in as Chris Rowen considers whether AI processing should take place at the edge or cloud, and why to be wary of building prejudice into machine learning systems. Arm's Zach Lasiuk walks through using continuous integration to develop software for custom SoCs with Fast Models. Rambus' Aharon Etengoff digs into how cold DRAM, operating at 77K, can support superconducting processors in cryogenic data centers.

Cadence's Christine Young presents two views on the challenges of teaching physical design and some creative approaches to get students involved in solving complex problems. In his latest video, Mentor's Colin Walls ponders the mysteries of the increment operator in C/C and how to use it most efficiently. Synopsys' Anand Shirahatti, Mohd Adil Khan, and Jamshed Alum look at two key features in 16 GT/s PCIe Gen 4 that are gaining traction in the quest for full bandwidth utilization. A previously unknown aspect of batteries has been detected which could result in a big leap forward, in this week's top five tech picks selected by Ansys' Bill Vandermark. When will AI be considered successful?